Summary of the Noise Tests performed at UCSB July 16-18 ======================================================= (C.Campagnari, A.Frey, M.Munson, N.Spencer, M.Wilder) All measurements were performed on the Layer-2 7x7 test beam module. Noise runs were usually taken with two different shaping time settings, 100 ns (nominal value for the layer 2 module) as well as 400 ns, since the setting with the longer shaping time is considerably more sensitive to noise. We took a lot of redundant runs to ensure the reproducibility of the results. The power supplies were configured such that the GND of all the floating supplies were tied to the bias voltage supply. (When we started the system power was not explicitly tied to the center tap of the bias voltage supply, a change of this had no impact on the performance.) The different DAT settings under test include the wire-wrap version, and three different sets of the PC DAT version. (The different HDI LInk Cards will be refered to as board #2-4. For information on the specific modifications on these boards, look at the write-ups on the web http://scipp.ucsc.edu/groups/babar/DAT.html) Measurements performed ---------------------- We started off with a noise measurement with the old wire-wrap Data Transmission (DAT) prototypes to be able to compare the values to the ones with the new (PC board) version. At 100 ns shaping time the fitted widths of the threshold scans peaked at 2.5 DAC counts for the n-side and about 2 for the p-side. For T_s = 400 ns the values were 3 and 3.3, respectively. No toroids were applied for these measurements. We switched to the new PC board DAT. Switching means an exchange of the signal and power cables as well as the DAQ Link and HDI Link Card. The matching card was the same as with the old DAT system. The noise levels were considerably higher than with the old wire wrap system. (3.4 DAC counts and 3.2 for T_s = 100 ns and 9.5 and 11.5 for T_s = 400 ns). The DAT system was the one used at the test beam at CERN, no modifications made to the HDI LInk Card. System_GND and the shield plane were strapped and the cable shield were connected to the shield layer on the board. We then put toroids on the LEMO cables that connect the ROM Module and the DAQ Link Card --> big improvement The noise was still slightly higher than with the wire-wrap DAT, though, particularly on the p-side. Next approach was to apply a metal braid between the SYSTEM_GND on the midplane between the DAQ Link and HDI Link Cards to the electronics rack --> considerable improvement. With the braid and the toroids around the TTL Lemo cables, the noise is less than with the old DAT system ! (2.3 DAC counts/1.9 for T_s=100ns, 3/2.5 for T_s=400ns) Additional toroids on the power cables between the power supplies and the MUX Cards may make a slight improvement (couple of percent). Also (and this being a very nice result) putting additional toroids around the power and signal cables going to the matching card (what was the recipe for the test beam) did not affect the noise performance. Board #3 has improved bypassing between the Local_5V and Local_0V as well as jumpers for the power traces that enwrap the analog power. We did not see a difference in the noise compared to board #2. Whether the shield layer was floating with respect to SYSTEM_GND or not did not make a significant difference. The main modifications on board #4 are that the shield and SYSTEM_GND planes that run beneath the digital circuitry and the power section were cut, so that essentially one power channel is isolated from the rest of the board. Thus, the cable shields of the power cable from the power supplies and the power cable to the matching card were connected via the shield in the board, but this was isolated from the rest of the system. This actually made things worse. We played a little bit with bypassing issues, e.g. larger bypassing caps (47uF) between the System voltage and the level translated voltages right at the data receivers on the HDI LInk card, but did not see any significant changes. Also, additional bypassing of all the HDI power lines (A5, A2, D5 + respective grounds) with 47uF to the System_GND did not change the noise values. Conclusions ----------- Average @100ns @400ns (in DAC counts) Noise values: n p n p old wire-wrap 2.5 2 3 3.3 PCB, no modific. 3.4 3.2 9.5 11.5 Braid + toroid added 2.3 1.9 3 2.5 Power shield isolated 3.1 2.7 (Board #4) (These numbers are approximate as read off the distributions) The big breakthroughs in the noise performance were due to the toroids around the TTL-LEMO cables and the heavy braid connecting the SYTEM_GND to the electronics rack. Everything else had only a minor impact on the measured noise levels. The LEMO cables carry single ended TTL that has to drive a 50 Ohm load. The way the noise runs are taken, there is no digital activity on the data lines coming back from the HDI's during a calibration strobe, thus it is very likely the activity on the command lines during the cal_strobe that inject considerable digital noise into the detector. That single ended TTL is prone to introduce trouble does not come as a surprise. For the final system we fortunately don't have to worry about that since the TTL part will be replaced by the fiber optics link. That the old wire-wrap system is apparently less susceptible to this problem may be due to the fact that the two cards were separated by a half meter twisted pair cable. The system needs a good and low impedance (a simple jumper will not do a good job !) connection to earth or SVT_common. We think that the MUX racks would be a good place to make the hard connection between SVT_Common/System_GND (and maybe shield) rather than back at the power supplies that are an additional 40 m away, since lowering the impedance to earth/SVT_Common will help reduce pick-up. Concerning design issues on the final HDI LInk Card: We did not see any indication that a major change in design is necessary. The best indication for this is that the toroids around the power and signal cables to the Matching Card did not improve the noise values. If the DAQ Link and HDI Link Card spewed digital noise into the cable, it should be reduced with the help of the toroids. However, the layout changes as described for board #3 will be implemented since we consider them a better design practice (more careful routing of the Local_5V and Local_GND and adequate bypassing between these.)