These pages summarize the tests of the AToM chip, rad-hard version 2 (pre production), performed at UCSC. Our main emphasis was the duty cycle sensitivity of the various commands.
Three Atom chips from the first batch were tested and mounted on on a UCSC test board. Commands were generated by a HP16500A logic analyzer system. A LeCroy 9210 pulse generator provided the external clock for the logic analyzer and the differential clock for the AToM chips. This allowed us to vary the duty cycle as well as the phase between clock and command (setup). The chip number used in the following plots are the chip addresses on the board.

The duty cycle values are always in [%] of the input clock provided by the LeCroy pulse generator.
 

At 60 Mhz the period is 16.67 ns and a range of the duty cycle in [%] corresponds to the following ranges in the width of the positive clock pulse:
 

Duty cycle range in [%]	Range in [ns]
1%	0.17 ns
5%	0.83 ns
10 %	1.67 ns

 
 

Index

• Write Register command
• Read Register command
• Write channel and calibration mask
• Readout Sequence
• global commands
• clock pulse shapes
• irradiation results

Summary

• The AToM chip version rad-hard 2 is sensitive to the clock duty cycle at 60 MHz. The write register command is the most sensitve and works only within 4%.
• The first bit of the mask, using the read register command, works in a narrower range than the readregister command itself. If it is not working the bit is zero independent of if the bit is set or not.