Tracker Configuration

A front-end chip and a controller chip have its own control register in it to store configuration of a tracker. Contents of control registers of a front-end chip can be re-written by a TEM board at anytime by sending a set-register command to the HDI's.

A front-end chip holds following information in the control register of 207 bits in total. To set a set of parameters to a front-end chip, a TEM board should send a Load-GTFE-Register command to a controller chip on the same HDI as the front-end chip, and let it send a Load-Register command to the front-end chip. Since each front-end chip is addressed uniquely in a tracker, you can write different setting to individual front-end chip.

Calibration mask

(64 bits)
Defines channel(s) into which a calibration strobe should be issued. If a channel is masked, no calibration charges will be injected on the channel. Each bit corresponds to a single input channel of the front-end chip.

Channel mask

(64 bits)
Defines channel(s) on which a signal from a detector strip should be latched. If a channel is masked, no hit is recorded on the channel. Each bit corresponds to a single input channel of the front-end chip.

Trigger mask

(64 bits)
Defines channel(s) which should contribute to a fast-OR signal of the chip. If a channel is masked, no signal on the channel generates a fast-OR signal. Each bit corresponds to a single input channel of the front-end chip.

Calibration DAC setting

(7 bits)
Defines the amount of charges injected by a calibration strobe in combination of 6 bit DAC value and 1 bit range selection. Only one value can be set for a chip. Low range and high range are available for threshold DAC. Threshold voltage ranges from 0.3 fC to 19 fC (0.3 fC step) in low range and from 1.2 fC to 77 fC (1.2 fC step) in high range.

Threshold DAC setting

(7 bits)
Defines threshold voltage in combination of 6 bit DAC value and 1 bit range selection. Only one threshold voltage can be set for a chip. Low range and high range are available for threshold DAC. Threshold voltage ranges from 6 mV to 380 mV (6 mV step) in low range and from 24 mV to 1.5 V (24 mV step) in high range.

Readout direction

(1 bit)
Defines in which direction (left or right) the front-end chip should send out hit information.

A controller chip keeps following information in its control register of 8 bits in total. To set a set of parameters to the controller chip, a TEM board should send a Load-Register command to a controller chip. Since each controller chip is addressed uniquely in a tracker, you can write different setting to individual controller chip.

Readout mode

(1 bit)
Defines whether the controller chip should initiate a readout sequence even without a fast-OR signal generated by the layer.

FCS attachment

(1 bit)
Defines whether the controller chip should calculate an FCS (Frame Check Sequence) and attach it to data. An FCS is a bit pattern of 11 bits calculated from bit sequence of data being sent with a CRC algorithm. With FCS a receiver of the data can check whether the data is corrupted during transmission.

Number of chips

(5 bit)
Defines the number of chips to be read by the controller chip.

Note that settings of readout direction of all the 25 front-end chips and two controller chips on an HDI must be consistent with each other. For example, suppose that you decide to readout the left 12 front-end chips from the left side of one HDI and the rest from the right. Then, you should set control direction of the left 12 front-end chips to ``left'', that of the rest to ``right'', and furthermore, you should set the number of chips of the left controller chip to ``12'' and that of the right one to ``13''. If you set them otherwise, readout of the HDI may be screwed up.