To operate the tracker, all the HDI's must be configured at first. All control parameters, such as threshold, must be set by writing them into a control register of a front-end chip or that of a controller chip. Contents of control registers are described in a later section.
Once it is configured, the tracker is ready to trigger a DAQ system in response to a particle passing through the tracker. If the amount of charges collected by a strip exceeds threshold, a corresponding channel of a front-end chip issues a fast-OR signal, which is immediately sent to a TEM board. At the same time, the length of the fast-OR signal, called Time-over-Threshold (ToT), is measured by a controller chip in charge of the front-end chip.
The TEM board judges whether to read it out or not. If the TEM board sees a hit (or more) on three consecutive x-y planes, the event should be read out ("3-in-a-row" condition). If and only if the TEM board receives trigger signals from three neighboring planes, it requests a level 1 trigger (L1T) to the DAQ system by sending an L1T request signal. In response to an L1T request, the DAQ system sends out an L1T signal to the TKR TEM board and other TEM boards for other instruments. The TKR TEM board fans out the L1T signal to all the layers in the tracker (trigger acknowledge signal), with which all the front-end chips latch hit status of all the 64 channels and store it to an event FIFO.
The TEM board starts a readout sequence. The TEM board sends a Read-Event command to all the controller chips on the tracker. In response to the command, controller chips automatically issue a Read-Event command to all the front-end chips on their HDI. The front-end chips responds it by extracting the hit status from an event FIFO and shifting it out all the way across the HDI until it gets to a controller chip. A controller chip counts a strip number while it is receiving hit status from front-end chips, and store the strip number into an event buffer when it is a hit on the channel. A controller chip also stores the time-over-threshold, the number of hits, a frame check sequence, etc., in the event buffer. To discard an event, the TEM board sends a Clear-Event command to all the controller chips, which issues a Clear-Event command to all the front-end chips. The front-end chips will erase the event in FIFO.
For an event to be read out, a TEM board issues a readout token, which is a digital signal given to a controller chip on the lowest layer on a cable. When a controller chip receives a token, it sends out contents of an event buffer to a controller chip on a lower neighboring layer, or to a TEM board in case of the lowest layer, and passes a token to a higher neighboring layer. Through this daisy chain of token/data passing, a TEM board eventually receives all the event buffer contents of eight controller chips on a readout cable one after another, as a readout token is being passed from the bottom controller chip to the top one. Readout procedures on all the eight readout cables takes place simultaneously. A TEM board put them altogether into an event buffer on the board, which can be read out through Ethernet.
Readout sequence for an event can be started anytime after the event, even after another event occurs. However, there is a limitation on the number of events which the tracker can hold until they are readout. A front-end chip can hold eight events and a controller chip has two event buffer. Once the number of events exceed those limits, the oldest event will be lost and overwritten by the new event. It is a TEM board's responsibility to keep track the number of events in front-end chips and in controller chips.