Single-chip test of GTFE64c --- Amp gain, noise, ToT, etc.
(PDF,
PostScript)
Electrical Test of HP 0.5-um Test Chip Version 2
(PDF)
Irradiation tests
SEE Test 2001:
test plan, test setup, and information on a test chip
(a laser-beam test at NRL and a heavy-ion beam test at INFN
on a test chip "top5")
Heavy-ion Beam Test at NIRS in Japan
(PDF; last updated on 9/1/00)
(Latchup Immunity Test of HP 0.5-um Test Chip Version 2)
Tentative Plan for Irradiation test on July 29th in Japan
(TEXT)
Electronics Meeting
Minutes of tracker electronics meeting on 05/03/00 at SLAC
(PDF)
FIFO occupancy study with Glastsim/gsc_shell
shows how full FIFO in GTFE64c will become under various
background rate, noise occupancy, and calorimeter latchup time.