Vme TEM2 board

Index

  1. FPGA Pin Layout
  2. Naming of treq and layers
  3. How to sent special command sequences

FPGA Pin Connection for Command, Data, Token and Tack

The following table shows the pins to monitor the command, token and data for the eight cables.


cable Nr. commanddatatoken
0 P11, 2 P17, 19 P10, 16
1 P10, 5 P17, 16 P12, 11
2 P15, 13 P15, 12 P16, 11
3 P15, 16 P10, 9 P16, 15
4 P15, 15 P10, 20 P16, 16
5 P14, 11 P10, 17 P11, 4
6 P12, 12 P17, 17 P10, 19
7 P14, 12 P16, 7 P14, 10
FPGA Pins for command, data and token for the eight cables



There is one trigger acknowledge, (P14, 13), that is send to all cables. The clock is found on pin P7, 1 (L1T FPGA).

Last modified: Tue Jan 23 11:47:13 PST 2001