Minutes of the Tracker Electronics Meeting
March 26, 2001
Ned said that he needs more memory in his laptop in order to run the extraction of the full chip on it. On Vallon’s 500 MHz, 256 MByte PC the extraction uses about 200 MByte RAM and takes a couple of hours at essentially 100% CPU utilization. Ned is worried that this is going to hold him up. Robert asked if a new computer like Dave’s 1.5GHz Pentium-4 machine would give a good gain in productivity. Wilko will check on what we can get quickly from Dell at the high end.
Ned said that he is now putting the 3 top-level digital cells together with Dieter’s front-end and the pad frame. He will put Dieter’s modifications in later, as he wants for the moment to concentrate on the full-blown layout to see what is going to be needed in terms of computer power.
Robert said that he improved the clock receiver comparator design by using a standard two-stage comparator design in place of Pavel’s more complex, symmetrized design. Simulations indicate about a factor of 2 improvement in switching speed in the first stages. He will simulate it together with the data output register and then give it to Ned for layout.
Wilko said that he received the analog simulation curves from Dieter. Wilko will finalize the specifications, and then he and Robert will update the DAC design this week and simulate it together with the front-end.
Masa is finishing up the noise measurements on the test chip. He has a problem with calibration because of pulser pickup. The pulser tends to bounce the ground plane. When there is a load capacitor from the amplifier input to ground, the ground bounce gets injected into the amplifier. The resulting pickup then depends on the size of the load capacitor, which confuses the calibration. (This is why the GTFE64C chip and Vallon’s test chip have LVDS calibration inputs.) Masa cannot measure the gain by injecting through a small load capacitor and then rely on that for measurements with a large load capacitor. Robert said that he could get from the simulation a prediction for the gain with 47pF load versus 2.2pF load. To reduce the pickup, Ned suggested attenuating the pulser signal further away from the test board. Masa said that he gets improvement by using a kohm termination on the pulser instead of 50 ohms. Ned suggested adding a toroid between the pulser and test board.
Wilko does not yet have more information on a new logic analyzer for test systems. Robert encouraged him to get going on setting up a purchase.
Masa & Mitsumi said that they plan to use the Liz-Board-4 test board for the SEU/SEL testing. They will borrow Arend’s setup with the logic analyzer for running the shift registers.