1 ;//.processor m68hc11 2 ; 3 ; File: Rts.asm 4 ; Startup Runtime Code for project TEST, 5 ; cmpe121 Spring 2001, basic test code for initial board verification. 6 ; 7 ; This assembly code is the first to be executed following a reset or 8 ; power-on boot. Generally, this is the place to do any reset (boot) initializations that 9 ; must be done during the first 64 clock cycles. 10 11 xdef __stext 12 xref _main, __memory 13 xref _ticks 14 15 ; The following lines define where code and data objects are to be located in the 16 ; 68HC11 memory map. You must insure that it agrees with your hardware design. 17 ; These "segment" or "section" boundaries are defined in the TEST.CMD file, which should 18 ; be edited by you to make things go where they should (see discussion in this file). 19 20 switch .bss 21 0000 __sbss: ;label to base of bss segment (static, uninit. data) 22 23 switch .bss 24 0000 __sdata: ;label base of data segment (init. data) 25 26 ;Executable code must begin at the base of the text segment. 27 switch .text 28 29 8040 __const: 30 31 8040 303132333435 lut: dc.b '0123456789ABCDEF',0 32 8051 1b5b481b5b32 clear_term: dc.b 1bh,5bh,48h,1bh,5bh,32h,4ah,0 33 8059 556e69536c75 init_text: dc.b 'UniSlug BIOS v0.1b',13,10,'********************************************************************************',13,10,13,10,0 34 80c2 54657374696e addr_ck: dc.b 'Testing address lines... ',13,10,0 35 80de 54657374696e ram_ck: dc.b 'Testing RAM registers... ',13,10,0 36 80fa 416464726573 addr_err: dc.b 'Address line ',0 37 8108 52414d207265 ram_err: dc.b 'RAM register ',0 38 8116 206661696c65 failed_err: dc.b ' failed!',13,10,0 39 8121 444f4e450d0a ck_done: dc.b 'DONE',13,10,0 40 41 8128 __stext: ;label to base of text segment (code in rom) 42 1 ;macro to output message 2 ;---------------------------- 3 ;input: a pointer to a null-terminated string, stored in idx reg Y 4 ;output: a pointer to the null terminator, stored in idx reg Y 5 ;uses: IY, B, A (implicitly) 6 ;---------------------------- 7 8 aoutstr: macro 9 \@aoutstr_start: 10 ldab 00h, y ; put a char in acc B 11 beq \@aoutstr_done ; if it's null (0000 0000), we're done here! 12 aoutch ; else, output the char 13 iny ; and point to the next char 14 jmp \@aoutstr_start ; curse, then recurse! 15 \@aoutstr_done: 16 endm 17 18 ;macro to output character 19 ;------------------------------ 20 ;input: a character, stored in acc B 21 ;output: none 22 ;uses: A, B 23 ;***** assumes internal registers are based at 8000h ***** 24 ;------------------------------ 25 26 aoutch: macro 27 ; brclr 02eh, y, #080h, _aoutch ;poll TDRE until set 28 \@aoutch_wait: 29 ldaa 802eh ;load acc A with SCSR 30 blt \@aoutch_send ;if bit 7 is high, number is 31 ;two's complement negative 32 ;-128 (1000 0000) to -1 (1111 1111) 33 jmp \@aoutch_wait 34 \@aoutch_send: 35 stab 802fh ;send the char! 36 endm 44 45 ;move the I/O mapping register to 0x8000h 46 ;---------------------------------------- 47 8128 8608 ldaa #08h 48 812a b7103d staa 103dh ; *** access-limited register (write in <64 clocks) 49 812d 18ce8000 ldy #08000h ; we just moved the I/O register! let's index off y... 50 51 ;setup an output compare register for chronological time 52 ;------------------------------------------------------- 53 8131 8603 ldaa #003h 54 8133 18a724 staa 24h, y ; *** access-limited register (write in <64 clocks) 55 ; set prescaler to E / 8 = 8.0 uS per count 56 8136 8640 ldaa #040h 57 8138 18a720 staa 20h, y ; enable output: toggle pin OC2 on successful compare 58 813b cef424 ldx #0f424h 59 813e cdef18 stx 18h, y ; set OC compare register for first compare @ 500 mS 60 8141 8640 ldaa #040h 61 8143 18a722 staa 22h, y ; enable OC2 interrupt 62 63 ;reset output ports 64 ;------------------ 65 8146 4f clra 66 8147 b77000 staa 07000h 67 814a b77800 staa 07800h 68 69 ;poll baud rate jumper and set BAUD register accordingly 70 ;------------------------------------------------------- 71 814d 181e008004 brset 00h, y, #80h, baud9600 ; if bit 7 of register 1000h is set goto baud9600 72 8152 baud300: 73 8152 8635 ldaa #035h 74 8154 2002 jmp baudset 75 8156 baud9600: 76 8156 8630 ldaa #030h 77 8158 baudset: 78 8158 18a72b staa 2bh, y 79 80 ;enable SCI tx (do rx later) 81 ;--------------------------- 82 815b 8608 ldaa #008h 83 815d 18a72d staa 2dh, y 84 8160 18ce8051 ldy #clear_term 85 aoutstr 86 8177 18ce8059 ldy #init_text 87 aoutstr 88 89 ;check RAM for stuck address lines 90 ;--------------------------------- 91 818e 18ce80c2 ldy #addr_ck 92 aoutstr 93 94 ;first we check A0-A7 95 ;without using internal RAM (0000-01FF) 96 ;-------------------------------------- 97 81a5 ce0201 ldx #0201h ; IX will hold address being checked 98 81a8 35 txs 99 81a9 ack1: 100 81a9 865a ldaa #05ah 101 81ab b70200 staa 0200h 102 81ae 86a5 ldaa #0a5h 103 81b0 a700 staa 00h, x ; load $0200 with 5Ah and $IX with A5h 104 81b2 865a ldaa #05ah 105 81b4 b10200 cmpa 0200h ; check $0200 106 81b7 266c bne ack_err 107 81b9 86a5 ldaa #0a5h 108 81bb a100 cmpa 00h, x ; check $IX 109 81bd 2666 bne ack_err 110 81bf ack_lo_rtn: 111 81bf 8f xgdx ; switch IX with acc d 112 81c0 58 lslb ; acc b shift left (low byte of address) 113 81c1 c100 cmpb #00h ; check low byte of acc d 114 81c3 2704 beq ack_lo_end ; and end if we're at $0200 (we just checked $0208) 115 81c5 8f xgdx ; otherwise put new addr in IX 116 81c6 35 txs 117 81c7 20e0 jmp ack1 118 119 ;now check A8 (0100), A9 (0200) 120 ;without using internal RAM (offset 0400) 121 ;---------------------------------------- 122 81c9 ack_lo_end: 123 81c9 ce0100 ldx #0100h ; check A8 124 81cc 35 txs 125 81cd 865a ldaa #05ah 126 81cf b70400 staa 0400h 127 81d2 86a5 ldaa #0a5h 128 81d4 b70500 staa 0500h 129 81d7 865a ldaa #05ah 130 81d9 b10400 cmpa 0400h 131 81dc 2647 bne ack_err 132 81de 86a5 ldaa #0a5h 133 81e0 b10500 cmpa 0500h 134 81e3 2640 bne ack_err 135 81e5 ack_a8_rtn: 136 81e5 ce0200 ldx #0200h ; check A9 137 81e8 35 txs 138 81e9 865a ldaa #05ah 139 81eb b70400 staa 0400h 140 81ee 86a5 ldaa #0a5h 141 81f0 b70600 staa 0600h 142 81f3 865a ldaa #05ah 143 81f5 b10400 cmpa 0400h 144 81f8 262b bne ack_err 145 81fa 86a5 ldaa #0a5h 146 81fc b10600 cmpa 0600h 147 81ff 2624 bne ack_err 148 8201 ack_a9_rtn: 149 150 ;finally check A10-A14 (0400-4000) 151 ;--------------------------------- 152 8201 ce0400 ldx #0400h ; IX will hold address being checked 153 8204 35 txs 154 8205 ack2: 155 8205 865a ldaa #05ah 156 8207 b70200 staa 0200h 157 820a 86a5 ldaa #0a5h 158 820c a700 staa 00h, x ; load $0200 with 5Ah and $IX with A5h 159 820e 865a ldaa #05ah 160 8210 b10200 cmpa 0200h ; check $0200 161 8213 2610 bne ack_err 162 8215 86a5 ldaa #0a5h 163 8217 a100 cmpa 00h, x ; check $IX 164 8219 260a bne ack_err 165 821b ack_hi_rtn: 166 821b 8f xgdx ; switch IX with acc d 167 821c 05 lsld ; acc d shift left 168 821d 8180 cmpa #80h ; check hi byte of acc d 169 821f 2771 beq ack_hi_end ; and end if we're at $8000 (we just checked $4000) 170 8221 8f xgdx ; otherwise put new addr in IX 171 8222 35 txs 172 8223 20e0 jmp ack2 173 174 8225 ack_err: 175 8225 18ce80fa ldy #addr_err ; output error message 176 aoutstr 177 ; now output bad line 178 823c 1830 tsy 179 823e 188f xgdy ; now IX is copied into acc d 180 8240 18ce0000 ldy #0000h ; clear IY 181 8244 ack_err1: 182 8244 c501 bitb #01h ; check bit 0 of acc d 183 8246 2605 bne ack_err2 184 8248 04 lsrd ; acc d shift right 185 8249 1808 iny ; increment IY 186 824b 20f7 jmp ack_err1 187 824d ack_err2: 188 824d 188f xgdy ; 189 824f c38040 addd #lut ; add LUT to IY 190 8252 188f xgdy ; 191 8254 18e600 ldab 00h, y ; output char in LUT 192 aoutch 193 194 8261 18ce8116 ldy #failed_err ; output error message 195 aoutstr 196 8278 8c0100 cpx #0100h ; where do we return... A8? 197 827b 26037e81e5 beq ack_a8_rtn 198 8280 8c0200 cpx #0200h ; A9? 199 8283 26037e8201 beq ack_a9_rtn 200 8288 8c0400 cpx #0400h ; A10 or higher? 201 828b 2c037e81bf blt ack_lo_rtn ; or A0 - A7! 202 8290 2089 bra ack_hi_rtn 203 204 8292 ack_hi_end: 205 8292 18ce8121 ldy #ck_done 206 aoutstr 207 208 209 ;check RAM for stuck bits 210 ;------------------------ 211 82a9 18ce80de ldy #ram_ck 212 aoutstr 213 214 82c0 ce0000 ldx #0000h ; IX will hold address being checked 215 82c3 35 txs 216 82c4 rck1: 217 82c4 865a ldaa #05ah 218 82c6 a700 staa 00h, x ; load $IX with 5ah 219 82c8 a100 cmpa 00h, x ; check $IX 220 82ca 2614 bne rck_err 221 82cc 86a5 ldaa #0a5h 222 82ce a700 staa 00h, x ; load $IX with a5h 223 82d0 a100 cmpa 00h, x ; check $IX 224 82d2 260c bne rck_err 225 82d4 rck_rtn: 226 82d4 08 inx ; increment address 227 82d5 8c7000 cpx #07000h ; end at $7000 (we just checked $6FFF) 228 82d8 26037e837f beq rck_end 229 82dd 35 txs 230 82de 20e4 jmp rck1 231 232 82e0 rck_err: 233 82e0 18ce8108 ldy #ram_err ; output error message 234 aoutstr 235 ; now output bad address 236 82f7 1830 tsy 237 82f9 188f xgdy ; now IX is copied into acc d 238 82fb 04 lsrd 239 82fc 04 lsrd 240 82fd 04 lsrd 241 82fe 04 lsrd 242 82ff 16 tab 243 8300 8400 anda #00h ; mask 244 8302 c38040 addd #lut ; add LUT to IY 245 8305 188f xgdy ; 246 8307 18e600 ldab 00h, y ; output char in LUT 247 aoutch 248 249 8314 1830 tsy 250 8316 188f xgdy ; now IX is copied into acc d 251 8318 840f anda #0fh ; mask 252 831a 16 tab 253 831b 8400 anda #00h ; mask 254 831d c38040 addd #lut ; add LUT to IY 255 8320 188f xgdy ; 256 8322 18e600 ldab 00h, y ; output char in LUT 257 aoutch 258 259 832f 1830 tsy 260 8331 188f xgdy ; now IX is copied into acc d 261 8333 54 lsrb 262 8334 54 lsrb 263 8335 54 lsrb 264 8336 54 lsrb 265 8337 8400 anda #00h ; mask 266 8339 c38040 addd #lut ; add LUT to IY 267 833c 188f xgdy ; 268 833e 18e600 ldab 00h, y ; output char in LUT 269 aoutch 270 271 834b 1830 tsy 272 834d 188f xgdy ; now IX is copied into acc d 273 834f 8400 anda #00h ; 274 8351 c40f andb #0fh ; mask 275 8353 c38040 addd #lut ; add LUT to IY 276 8356 188f xgdy ; 277 8358 18e600 ldab 00h, y ; output char in LUT 278 aoutch 279 280 8365 18ce8116 ldy #failed_err 281 aoutstr ; output error message 282 837c 7e82d4 jmp rck_rtn 283 284 837f rck_end: 285 837f 18ce8121 ldy #ck_done 286 aoutstr 287 288 289 ;setup the stack frame at the top of zpage inside the hc11 290 ;--------------------------------------------------------- 291 8396 ce00ff ldx #0ffh ; x <- ffh 292 8399 35 txs ; sp <- x 293 294 ;initialize time variable 295 ;------------------------ 296 839a 4f clra 297 839b b72108 staa _ticks 298 839e b72109 staa _ticks+1 299 83a1 b7210a staa _ticks+2 300 83a4 b7210b staa _ticks+3 301 302 ;all ready? enable SCI rx & let the interrupts begin! 303 ;----------------------------------------------------- 304 83a7 860c ldaa #00Ch 305 83a9 b7802d staa 802dh 306 83ac 0e cli 307 308 ;jump into the "c" 309 ;----------------- 310 83ad 7e84f7 jmp _main ; execute main() in test.c 311 end